GAL16V8 :3- 4 bit counter using macrocell

We will construct a 4 bit counter using the GAL16V8, but instead of constructing the latch like in the previous post, LATCHES, SR LATCH. we will use the builtin flip flop of the MACROCELL.

As a quick reference, a D type flip flop is a device that can store one value, like the SR LATCH, however the value will only be stored on the rising edge of the clock. In reality it does the change using both the rising and falling edge of the clock. You can have a deeper insight of its works with this video from Ben Eater. https://www.youtube.com/watch?v=rXHSB5w7CyE

When configuring a macrocell you need to describe the equations which based in the current state, will change the next state.

When configuring the D-Latch you need to think on how the next state will be reached based on the current state. We can think of it as current state, Q and next state QNext.

In a 1 bit binary counter, when Q is 0, the next state is 1. and when Q is 1, we overflow and the next state is 0. Making it effectively that QNext is !Q, such equation would look like this.

QNext = !Q;

Lets see what would be the truth table for this 1 bit counter.

QQ Next
01
10

Now, the second less significant bit, Q2, will have its next state based on two values, the value of Q and the value of Q2. For the rest of the examples we will call Q as Q1.

The first condition of Q2 is that it will change every time Q1 transitions from 1 to 0, or effectively, every time !Q1.

We can see that in the following truth table.

Q2Q1Q2NextQ1Next
0001
0110
1011
1100

Q2Next = (Q2 and !Q1) or (!Q2 and Q1)

In colloquial language this could be expressed as the following quote.

If Q1 is true, Q2Next will be complement of Q2, if Q1 is false, Q2 don’t change.

Now, the way to write this code in CUPL, to be able to progaram with our gal will be very similar, however CUPL does not have a QNext, instead it have a Q.d where d stands for DLatch. So our equation in CUPL will be like this for Q1 and Q2.

Q2.d = (!Q1 & Q0) # (Q1 & !Q0);
Q1.d = !Q0; 

We can follow the same analysis for the other 2 bits. If we decide to do so we could get a CUPL code similar to this one. This code also includes a clr input, to reset the counter to 0 at any time.

Name  CCCCCC;
 Partno XXXXXX;
 Date XX/XX/XX;
 Revision XX;
 Designer XXXXXX;
 Company XXXXXX;
 Assembly XXXXXX;
 Location XXXXXX;
 Device g16v8ms
 PIN 1 = clk;
 PIN 2 = clr;
 PIN 15 = Q0;
 PIN 14 = Q1;
 PIN 13 = Q2;
 PIN 12 = Q3;
 Q3.d = !clr & ((!Q3 & Q2 & Q1 & Q0) # (Q3 & !(Q2 & Q1 & Q0)));
 Q2.d = !clr & ((!Q2 & Q1 & Q0) # (Q2 & !(Q1 & Q0)));
 Q1.d = !clr & (!Q1 & Q0 # Q1 & !Q0);
 Q0.d = !clr & !Q0;

This would be the wiring diagram.

4 bit counter from aruduino

The clock is being generated by an arduino, but it could be generated by any means, including a 555 timer as long as is a square wave between 0 and 5 volts. (for this circuit that is being powered by 5V).

Also here we can see the the circuit assembled in action, I added a small yellow led to see the state of the clock.

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